Due to the extensive use and broad range of applications for integrated circuits, a wide variety of semiconductor memory devices have been developed. Many memory devices, such as dynamic random access memory cells (DRAM cells), use a dynamic memory cell in which a bit is represented by a charge stored in a capacitor structure.
The size of the individual cell is an important consideration in the production of DRAMs. To save space on the surface of the chip, a deep trench capacitor may be used to form the device. Once the capacitor layout has been selected, the capacitor must be coupled with the storage node of its access transistor by a conductive strap. However, due to the high density of semiconductor devices, little room is available on the surface of the chip for the conductive strap.
Therefore, a buried conductive strap is often used to connect the capacitor and its access transistor. Because the strap is buried, there is more room on the surface of the semiconductor chip. This facilitates production of higher device densities, producing more densely packed memory arrays with greater storage capacity. Further, because the contacts of the buried strap are formed early in the integrated process (i.e, prior to formation of many surface structures), the possibility of damage to later-formed surface structures during strap formation is eliminated.
The method for forming the buried strap is key to the economical production of DRAMs. Therefore, there is a continuing need for processes for forming buried strap comprising semiconductor devices that use fewer processing sequences and produce these devices at a reduced cost.